1. Technical Field
The present invention relates to a semiconductor device and a method of manufacturing the same.
2. Related Art
FIG. 7 is a cross-sectional view showing a conventional semiconductor device. In the semiconductor device 100, a SiGe epitaxial layer 102 and a silicon epitaxial layer 103 are sequentially stacked on a silicon substrate 101. The silicon epitaxial layer 103 includes a field effect transistor (hereinafter, FET) 110 constituted of a source/drain region 111, a gate electrode 112 and so forth. The FET 110 is isolated from other elements by a shallow trench isolation (hereinafter, STI) 104 formed around the FET 110.
Techniques related to the present invention are disclosed, for example, in Japanese Laid-open patent publication No. H10-284722 (patent document 1) and U.S. Pat. No. 6,121,100 Specification (patent document 2).